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<div class="header">
  <div class="summary">
<a href="#func-members">Functions</a>  </div>
  <div class="headertitle">
<div class="title">Functions<div class="ingroups"><a class="el" href="group__group__sysclk.html">SysClk       (System Clock)</a> &raquo; <a class="el" href="group__group__sysclk__clk__fast.html">Fast Clock</a></div></div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga05a3e0e120574d1205c2b2f9861dc733"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__fast__funcs.html#ga05a3e0e120574d1205c2b2f9861dc733">Cy_SysClk_ClkFastSetDivider</a> (uint8_t divider)</td></tr>
<tr class="memdesc:ga05a3e0e120574d1205c2b2f9861dc733"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the clock divider for the fast clock, which sources the main processor.  <a href="#ga05a3e0e120574d1205c2b2f9861dc733">More...</a><br /></td></tr>
<tr class="separator:ga05a3e0e120574d1205c2b2f9861dc733"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga414d0aa5c8df4a5b16c91614ff967e3a"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__fast__funcs.html#ga414d0aa5c8df4a5b16c91614ff967e3a">Cy_SysClk_ClkFastGetDivider</a> (void)</td></tr>
<tr class="memdesc:ga414d0aa5c8df4a5b16c91614ff967e3a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the clock divider for the fast clock.  <a href="#ga414d0aa5c8df4a5b16c91614ff967e3a">More...</a><br /></td></tr>
<tr class="separator:ga414d0aa5c8df4a5b16c91614ff967e3a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2fd7d9e080181356a1e6a5a72d948119"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__fast__funcs.html#ga2fd7d9e080181356a1e6a5a72d948119">Cy_SysClk_ClkFastGetFrequency</a> (void)</td></tr>
<tr class="memdesc:ga2fd7d9e080181356a1e6a5a72d948119"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reports the frequency of the fast clock.  <a href="#ga2fd7d9e080181356a1e6a5a72d948119">More...</a><br /></td></tr>
<tr class="separator:ga2fd7d9e080181356a1e6a5a72d948119"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2ce026196feb54b320018717643b35d8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__fast__funcs.html#ga2ce026196feb54b320018717643b35d8">Cy_SysClk_ClkFastSrcSetDivider</a> (uint32_t clkFastNum, uint8_t intDiv, uint8_t fracDiv)</td></tr>
<tr class="memdesc:ga2ce026196feb54b320018717643b35d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the clock divider for the fast clock, which sources the main processor.  <a href="#ga2ce026196feb54b320018717643b35d8">More...</a><br /></td></tr>
<tr class="separator:ga2ce026196feb54b320018717643b35d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae1f57c49981b7f62a3d09c040f000d29"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__fast__funcs.html#gae1f57c49981b7f62a3d09c040f000d29">Cy_SysClk_ClkFastSrcGetDivider</a> (uint32_t clkFastNum, uint32_t *dividerIntValue, uint32_t *dividerFracValue)</td></tr>
<tr class="memdesc:gae1f57c49981b7f62a3d09c040f000d29"><td class="mdescLeft">&#160;</td><td class="mdescRight">Returns the Integer and Fractional clock divider for the fast clock.  <a href="#gae1f57c49981b7f62a3d09c040f000d29">More...</a><br /></td></tr>
<tr class="separator:gae1f57c49981b7f62a3d09c040f000d29"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabe3c665ba505489d3c831daa44e4eabf"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__sysclk__clk__fast__funcs.html#gabe3c665ba505489d3c831daa44e4eabf">Cy_SysClk_ClkFastSrcGetFrequency</a> (uint32_t clkFastNum)</td></tr>
<tr class="memdesc:gabe3c665ba505489d3c831daa44e4eabf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reports the frequency of the fast clock.  <a href="#gabe3c665ba505489d3c831daa44e4eabf">More...</a><br /></td></tr>
<tr class="separator:gabe3c665ba505489d3c831daa44e4eabf"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Function Documentation</h2>
<a id="ga05a3e0e120574d1205c2b2f9861dc733"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga05a3e0e120574d1205c2b2f9861dc733">&#9670;&nbsp;</a></span>Cy_SysClk_ClkFastSetDivider()</h2>

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          <td class="memname">void Cy_SysClk_ClkFastSetDivider </td>
          <td>(</td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>divider</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Sets the clock divider for the fast clock, which sources the main processor. </p>
<p>The source of this divider is clkHf[0].</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">divider</td><td>divider value between 0 and 255. Causes integer division of (divider value + 1), or division by 1 to 256.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>Call <a class="el" href="group__group__startup__config__system__functions.html#gae0c36a9591fe6e9c45ecb21a794f0f0f">SystemCoreClockUpdate</a> after this function calling.</dd>
<dd>
Call <a class="el" href="group__group__syslib__functions.html#ga8b897f8554957f9393f645d5ab1106c9">Cy_SysLib_SetWaitStates</a> before calling this function if CLK_FAST frequency is increasing.</dd>
<dd>
Call <a class="el" href="group__group__syslib__functions.html#ga8b897f8554957f9393f645d5ab1106c9">Cy_SysLib_SetWaitStates</a> after calling this function if CLK_FAST frequency is decreasing.</dd>
<dd>
This API is available only for CAT1A devices.</dd></dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: HFCLK0 is configured and enabled. The Fast clock sourcing the</span></div><div class="line"><span class="comment">                 CM4 core must run at a frequency that is 1/16 of HFCLK0. */</span></div><div class="line"></div><div class="line">    <span class="keywordflow">if</span>(16u != <a class="code" href="group__group__sysclk__clk__fast__funcs.html#ga414d0aa5c8df4a5b16c91614ff967e3a">Cy_SysClk_ClkFastGetDivider</a>())</div><div class="line">    {</div><div class="line">        <a class="code" href="group__group__sysclk__clk__fast__funcs.html#ga05a3e0e120574d1205c2b2f9861dc733">Cy_SysClk_ClkFastSetDivider</a>(16u);</div><div class="line">    }</div><div class="line"></div><div class="line">    <span class="comment">/* Get the CM4 clock source frequency */</span></div><div class="line">    uint32_t clkFastfreq = <a class="code" href="group__group__sysclk__clk__fast__funcs.html#ga2fd7d9e080181356a1e6a5a72d948119">Cy_SysClk_ClkFastGetFrequency</a>();</div></div><!-- fragment --></dd></dl>

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</div>
<a id="ga414d0aa5c8df4a5b16c91614ff967e3a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga414d0aa5c8df4a5b16c91614ff967e3a">&#9670;&nbsp;</a></span>Cy_SysClk_ClkFastGetDivider()</h2>

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          <td class="memname">uint8_t Cy_SysClk_ClkFastGetDivider </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Returns the clock divider for the fast clock. </p>
<dl class="section return"><dt>Returns</dt><dd>The divider value for the fast clock. The integer division done is by (divider value + 1), or division by 1 to 256.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This API is available only for CAT1A devices.</dd></dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: HFCLK0 is configured and enabled. The Fast clock sourcing the</span></div><div class="line"><span class="comment">                 CM4 core must run at a frequency that is 1/16 of HFCLK0. */</span></div><div class="line"></div><div class="line">    <span class="keywordflow">if</span>(16u != <a class="code" href="group__group__sysclk__clk__fast__funcs.html#ga414d0aa5c8df4a5b16c91614ff967e3a">Cy_SysClk_ClkFastGetDivider</a>())</div><div class="line">    {</div><div class="line">        <a class="code" href="group__group__sysclk__clk__fast__funcs.html#ga05a3e0e120574d1205c2b2f9861dc733">Cy_SysClk_ClkFastSetDivider</a>(16u);</div><div class="line">    }</div><div class="line"></div><div class="line">    <span class="comment">/* Get the CM4 clock source frequency */</span></div><div class="line">    uint32_t clkFastfreq = <a class="code" href="group__group__sysclk__clk__fast__funcs.html#ga2fd7d9e080181356a1e6a5a72d948119">Cy_SysClk_ClkFastGetFrequency</a>();</div></div><!-- fragment --></dd></dl>

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<a id="ga2fd7d9e080181356a1e6a5a72d948119"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga2fd7d9e080181356a1e6a5a72d948119">&#9670;&nbsp;</a></span>Cy_SysClk_ClkFastGetFrequency()</h2>

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        <tr>
          <td class="memname">uint32_t Cy_SysClk_ClkFastGetFrequency </td>
          <td>(</td>
          <td class="paramtype">void&#160;</td>
          <td class="paramname"></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reports the frequency of the fast clock. </p>
<dl class="section return"><dt>Returns</dt><dd>The frequency, in Hz.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This API is available only for CAT1A devices.</dd></dl>
<dl class="section user"><dt>Function Usage</dt><dd><div class="fragment"><div class="line">    <span class="comment">/* Scenario: HFCLK0 is configured and enabled. The Fast clock sourcing the</span></div><div class="line"><span class="comment">                 CM4 core must run at a frequency that is 1/16 of HFCLK0. */</span></div><div class="line"></div><div class="line">    <span class="keywordflow">if</span>(16u != <a class="code" href="group__group__sysclk__clk__fast__funcs.html#ga414d0aa5c8df4a5b16c91614ff967e3a">Cy_SysClk_ClkFastGetDivider</a>())</div><div class="line">    {</div><div class="line">        <a class="code" href="group__group__sysclk__clk__fast__funcs.html#ga05a3e0e120574d1205c2b2f9861dc733">Cy_SysClk_ClkFastSetDivider</a>(16u);</div><div class="line">    }</div><div class="line"></div><div class="line">    <span class="comment">/* Get the CM4 clock source frequency */</span></div><div class="line">    uint32_t clkFastfreq = <a class="code" href="group__group__sysclk__clk__fast__funcs.html#ga2fd7d9e080181356a1e6a5a72d948119">Cy_SysClk_ClkFastGetFrequency</a>();</div></div><!-- fragment --></dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga2ce026196feb54b320018717643b35d8">&#9670;&nbsp;</a></span>Cy_SysClk_ClkFastSrcSetDivider()</h2>

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        <tr>
          <td class="memname">void Cy_SysClk_ClkFastSrcSetDivider </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>clkFastNum</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>intDiv</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint8_t&#160;</td>
          <td class="paramname"><em>fracDiv</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Sets the clock divider for the fast clock, which sources the main processor. </p>
<p>The source of this divider is clkHf[0].</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">clkFastNum</td><td>0 for CLOCK_FAST_0 and 1 for CLOCK_FAST_1</td></tr>
    <tr><td class="paramname">intDiv</td><td>Integer divider</td></tr>
    <tr><td class="paramname">fracDiv</td><td>Fractional divider</td></tr>
  </table>
  </dd>
</dl>
<dl class="section note"><dt>Note</dt><dd>Call <a class="el" href="group__group__startup__config__system__functions.html#gae0c36a9591fe6e9c45ecb21a794f0f0f">SystemCoreClockUpdate</a> after this function calling.</dd>
<dd>
Call <a class="el" href="group__group__syslib__functions.html#ga8b897f8554957f9393f645d5ab1106c9">Cy_SysLib_SetWaitStates</a> before calling this function if CLK_FAST frequency is increasing.</dd>
<dd>
Call <a class="el" href="group__group__syslib__functions.html#ga8b897f8554957f9393f645d5ab1106c9">Cy_SysLib_SetWaitStates</a> after calling this function if CLK_FAST frequency is decreasing.</dd>
<dd>
This API is available only for CAT1C devices. </dd></dl>

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<a id="gae1f57c49981b7f62a3d09c040f000d29"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae1f57c49981b7f62a3d09c040f000d29">&#9670;&nbsp;</a></span>Cy_SysClk_ClkFastSrcGetDivider()</h2>

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          <td class="memname">void Cy_SysClk_ClkFastSrcGetDivider </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>clkFastNum</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t *&#160;</td>
          <td class="paramname"><em>dividerIntValue</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">uint32_t *&#160;</td>
          <td class="paramname"><em>dividerFracValue</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Returns the Integer and Fractional clock divider for the fast clock. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">clkFastNum</td><td>0 for CLOCK_FAST_0 and 1 for CLOCK_FAST_1</td></tr>
    <tr><td class="paramname">dividerIntValue</td><td>- Integer divider</td></tr>
    <tr><td class="paramname">dividerFracValue</td><td>- Fractional divider</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. Loads pointed-to variables.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This API is available only for CAT1C devices. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gabe3c665ba505489d3c831daa44e4eabf">&#9670;&nbsp;</a></span>Cy_SysClk_ClkFastSrcGetFrequency()</h2>

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          <td class="memname">uint32_t Cy_SysClk_ClkFastSrcGetFrequency </td>
          <td>(</td>
          <td class="paramtype">uint32_t&#160;</td>
          <td class="paramname"><em>clkFastNum</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reports the frequency of the fast clock. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">clkFastNum</td><td>0 for CLOCK_FAST_0 and 1 for CLOCK_FAST_1</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The frequency, in Hz.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This API is available only for CAT1C devices. </dd></dl>

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